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| H A D | hw_breakpoint.c | diff a26bce1220a4c5a7a074a779e6aad3cae63a94f7 Fri Oct 07 09:57:55 CDT 2011 Will Deacon <will.deacon@arm.com> ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 cores
ARMv6 cores do not implement the DBGOSLAR register, so we don't need to
try and clear it on boot. Furthermore, the VCR is zeroed out of reset,
so we don't need to zero it explicitly when a CPU comes online.
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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