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| /openbmc/u-boot/arch/mips/lib/ |
| H A D | cache_init.S | diff 9f8ac82452d8bb5eccc38a0c3c0a8f82e1774452 Mon May 16 04:52:10 CDT 2016 Paul Burton <paul.burton@imgtec.com> MIPS: Use unchecked immediate addition/subtraction
In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| /openbmc/u-boot/arch/mips/cpu/ |
| H A D | start.S | diff 9f8ac82452d8bb5eccc38a0c3c0a8f82e1774452 Mon May 16 04:52:10 CDT 2016 Paul Burton <paul.burton@imgtec.com> MIPS: Use unchecked immediate addition/subtraction
In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
|