Searched hist:"9 bf825bf3df4ebae3af51566c8088e3f1249a910" (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/accel/tcg/ |
H A D | cputlb.c | diff 9bf825bf3df4ebae3af51566c8088e3f1249a910 Fri Aug 23 13:36:54 CDT 2019 Tony Nguyen <tony.nguyen@bt.com> memory: Single byte swap along the I/O path
Now that MemOp has been pushed down into the memory API, and callers are encoding endianness, we can collapse byte swaps along the I/O path into the accelerator and target independent adjust_endianness.
Collapsing byte swaps along the I/O path enables additional endian inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant byte swaps cancelling out.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> Message-Id: <911ff31af11922a9afba9b7ce128af8b8b80f316.1566466906.git.tony.nguyen@bt.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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/openbmc/qemu/hw/virtio/ |
H A D | virtio-pci.c | diff 9bf825bf3df4ebae3af51566c8088e3f1249a910 Fri Aug 23 13:36:54 CDT 2019 Tony Nguyen <tony.nguyen@bt.com> memory: Single byte swap along the I/O path
Now that MemOp has been pushed down into the memory API, and callers are encoding endianness, we can collapse byte swaps along the I/O path into the accelerator and target independent adjust_endianness.
Collapsing byte swaps along the I/O path enables additional endian inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant byte swaps cancelling out.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> Message-Id: <911ff31af11922a9afba9b7ce128af8b8b80f316.1566466906.git.tony.nguyen@bt.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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