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/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.cdiff 9b88a4bda2955b23262736d70e5c3d3c36685db0 Thu Dec 28 09:10:01 CST 2017 Lokesh Vutla <lokeshvutla@ti.com> arm: am33xx: Avoid writing into reserved DPLL divider

DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>