Searched hist:"9 ace9f7b168fef492f731ba60da5c76bc0776e6d" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | radeon_atombios.c | diff 9ace9f7b168fef492f731ba60da5c76bc0776e6d Thu Jan 06 20:19:26 CST 2011 Alex Deucher <alexdeucher@gmail.com> drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
NI chips no longer load the MC ucode in the asic_init sequence so
the asic comes up in a basic mode with low engine/memory clocks and
a voltage. Once the MC ucode is loaded by the driver the card
can be programmed to it's proper default clocks and voltage. As such
the default clocks in the firmware info table as the post clocks, not
the default running clocks. Track the default post clocks and default
running clocks separately to handle this.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
| H A D | radeon_pm.c | diff 9ace9f7b168fef492f731ba60da5c76bc0776e6d Thu Jan 06 20:19:26 CST 2011 Alex Deucher <alexdeucher@gmail.com> drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
NI chips no longer load the MC ucode in the asic_init sequence so
the asic comes up in a basic mode with low engine/memory clocks and
a voltage. Once the MC ucode is loaded by the driver the card
can be programmed to it's proper default clocks and voltage. As such
the default clocks in the firmware info table as the post clocks, not
the default running clocks. Track the default post clocks and default
running clocks separately to handle this.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
| H A D | radeon.h | diff 9ace9f7b168fef492f731ba60da5c76bc0776e6d Thu Jan 06 20:19:26 CST 2011 Alex Deucher <alexdeucher@gmail.com> drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
NI chips no longer load the MC ucode in the asic_init sequence so
the asic comes up in a basic mode with low engine/memory clocks and
a voltage. Once the MC ucode is loaded by the driver the card
can be programmed to it's proper default clocks and voltage. As such
the default clocks in the firmware info table as the post clocks, not
the default running clocks. Track the default post clocks and default
running clocks separately to handle this.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
|