Searched hist:"987 f625e0799c9666ce0a0e18c2d0c001db96fad" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/x86/kvm/ |
| H A D | lapic.h | diff 987f625e0799c9666ce0a0e18c2d0c001db96fad Fri Jun 10 12:11:29 CDT 2022 Jue Wang <juew@google.com> KVM: x86: Add APIC_LVTx() macro.
An APIC_LVTx macro is introduced to calcualte the APIC_LVTx register
offset based on the index in the lapic_lvt_entry enum. Later patches
will extend the APIC_LVTx macro to support the APIC_LVTCMCI register
in order to implement Corrected Machine Check Interrupt signaling.
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Jue Wang <juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220610171134.772566-4-juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| H A D | lapic.c | diff 987f625e0799c9666ce0a0e18c2d0c001db96fad Fri Jun 10 12:11:29 CDT 2022 Jue Wang <juew@google.com> KVM: x86: Add APIC_LVTx() macro.
An APIC_LVTx macro is introduced to calcualte the APIC_LVTx register
offset based on the index in the lapic_lvt_entry enum. Later patches
will extend the APIC_LVTx macro to support the APIC_LVTCMCI register
in order to implement Corrected Machine Check Interrupt signaling.
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Jue Wang <juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220610171134.772566-4-juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|