Searched hist:"9855 b3beca648dabe4d86b06d36bf219ebd0732d" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | ctrl_regs.c | diff 9855b3beca648dabe4d86b06d36bf219ebd0732d Fri May 23 15:15:00 CDT 2014 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.
Signed-off-by: York Sun <yorksun@freescale.com>
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cmd_errata.c | diff 9855b3beca648dabe4d86b06d36bf219ebd0732d Fri May 23 15:15:00 CDT 2014 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.
Signed-off-by: York Sun <yorksun@freescale.com>
|
| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | config_mpc85xx.h | diff 9855b3beca648dabe4d86b06d36bf219ebd0732d Fri May 23 15:15:00 CDT 2014 York Sun <yorksun@freescale.com> powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.
Signed-off-by: York Sun <yorksun@freescale.com>
|