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H A Dcpu.cdiff 95e9a242e2a393c7d4e5cc04340e39c3a9420f03 Fri Apr 28 07:56:32 CDT 2017 Luc MICHEL <luc.michel@git.antfield.fr> target/arm: add data cache invalidation cp15 instruction to cortex-r5

The cp15, CRn=15, opc1=0, CRm=5, opc2=0 instruction invalidates all the
data cache on the cortex-r5. Implementing it as a NOP.

Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>