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H A Dsdhci.cdiff 9321c1f2d08817fdb90ad129fbe3194207e73ba0 Thu Sep 03 10:31:04 CDT 2020 Philippe Mathieu-Daudé <f4bug@amsat.org> hw/sd/sdhci: Yield if interrupt delivered during multiple transfer

The Descriptor Table has a bit to allow the DMA to generates
Interrupt when the operation of the descriptor line is completed
(see "1.13.4. Descriptor Table" of 'SD Host Controller Simplified
Specification Version 2.00').

If we have pending interrupt and the descriptor requires it
to be generated as soon as it is completed, reschedule pending
transfers and yield to the CPU.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20200903172806.489710-5-f4bug@amsat.org>