Searched hist:"9157 dccc7e71f7c94581c38f38acbef9a21bbe9a" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/target/sparc/ |
| H A D | vis_helper.c | diff 9157dccc7e71f7c94581c38f38acbef9a21bbe9a Thu May 02 11:55:24 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|
| H A D | helper.h | diff 9157dccc7e71f7c94581c38f38acbef9a21bbe9a Thu May 02 11:55:24 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|
| H A D | translate.c | diff 9157dccc7e71f7c94581c38f38acbef9a21bbe9a Thu May 02 11:55:24 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-4-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|