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/openbmc/qemu/target/arm/
H A Dcpu.cdiff 910e4f24975f53645d308aa6c895f4599dd47c43 Tue Dec 06 04:24:59 CST 2022 Tobias Röhmel <tobias.roehmel@rwth-aachen.de> target/arm: Make RVBAR available for all ARMv8 CPUs

RVBAR shadows RVBAR_ELx where x is the highest exception
level if the highest EL is not EL3. This patch also allows
ARMv8 CPUs to change the reset address with
the rvbar property.

Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221206102504.165775-3-tobias.roehmel@rwth-aachen.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
H A Dhelper.cdiff 910e4f24975f53645d308aa6c895f4599dd47c43 Tue Dec 06 04:24:59 CST 2022 Tobias Röhmel <tobias.roehmel@rwth-aachen.de> target/arm: Make RVBAR available for all ARMv8 CPUs

RVBAR shadows RVBAR_ELx where x is the highest exception
level if the highest EL is not EL3. This patch also allows
ARMv8 CPUs to change the reset address with
the rvbar property.

Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221206102504.165775-3-tobias.roehmel@rwth-aachen.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>