Searched hist:"8 dc4af8bef127425271e06d09370a2479dae69c3" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/clk/at91/ |
| H A D | clk-sam9x60-pll.c | diff 8dc4af8bef127425271e06d09370a2479dae69c3 Thu Nov 19 09:43:12 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-sam9x60-pll: allow runtime changes for pll
Allow runtime frequency changes for PLLs registered with proper flags.
This is necessary for CPU PLL on SAMA7G5 which is used by DVFS.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | sama7g5.c | diff 8dc4af8bef127425271e06d09370a2479dae69c3 Thu Nov 19 09:43:12 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-sam9x60-pll: allow runtime changes for pll
Allow runtime frequency changes for PLLs registered with proper flags.
This is necessary for CPU PLL on SAMA7G5 which is used by DVFS.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | sam9x60.c | diff 8dc4af8bef127425271e06d09370a2479dae69c3 Thu Nov 19 09:43:12 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-sam9x60-pll: allow runtime changes for pll
Allow runtime frequency changes for PLLs registered with proper flags.
This is necessary for CPU PLL on SAMA7G5 which is used by DVFS.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | pmc.h | diff 8dc4af8bef127425271e06d09370a2479dae69c3 Thu Nov 19 09:43:12 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-sam9x60-pll: allow runtime changes for pll
Allow runtime frequency changes for PLLs registered with proper flags.
This is necessary for CPU PLL on SAMA7G5 which is used by DVFS.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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