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H A D | intel_cdclk.c | diff 86c0ef7234a7c517b010fd5ecf1e176127bce521 Thu Nov 17 17:00:02 CST 2022 Anusha Srivatsa <anusha.srivatsa@intel.com> drm/i915/display: Add CDCLK Support for MTL
As per bSpec MTL has 38.4 MHz Reference clock. Adding the cdclk tables and cdclk_funcs that MTL will use.
v2: Revert to using bxt_get_cdclk()
BSpec: 65243
Cc: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221117230002.792096-3-anusha.srivatsa@intel.com
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