Searched hist:"85 fb352666732a9e5caf6027b9c253b3d7881d8f" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/sun4i/ |
| H A D | sun6i_mipi_dsi.h | diff 85fb352666732a9e5caf6027b9c253b3d7881d8f Mon Feb 11 08:41:22 CST 2019 Maxime Ripard <maxime.ripard@bootlin.com> drm/sun4i: dsi: Restrict DSI tcon clock divider
The current code allows the TCON clock divider to have a range between 4
and 127 when feeding the DSI controller.
The only display supported so far had a display clock rate that ended up
using a divider of 4, but testing with other displays show that only 4
seems to be functional.
This also aligns with what Allwinner is doing in their BSP, so let's just
hardcode that we want a divider of 4 when using the DSI output.
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/074e88ae472f5e0492e26939c74b44fb4125ffbd.1549896081.git-series.maxime.ripard@bootlin.com
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| H A D | sun4i_tcon.c | diff 85fb352666732a9e5caf6027b9c253b3d7881d8f Mon Feb 11 08:41:22 CST 2019 Maxime Ripard <maxime.ripard@bootlin.com> drm/sun4i: dsi: Restrict DSI tcon clock divider
The current code allows the TCON clock divider to have a range between 4
and 127 when feeding the DSI controller.
The only display supported so far had a display clock rate that ended up
using a divider of 4, but testing with other displays show that only 4
seems to be functional.
This also aligns with what Allwinner is doing in their BSP, so let's just
hardcode that we want a divider of 4 when using the DSI output.
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/074e88ae472f5e0492e26939c74b44fb4125ffbd.1549896081.git-series.maxime.ripard@bootlin.com
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