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| H A D | intel-lpss-pci.c | diff 85a9419a254e234c997a2bf56b71264009ebc117 Tue Nov 15 04:37:04 CST 2016 Andy Shevchenko <andriy.shevchenko@linux.intel.com> mfd: intel-lpss: Try to enable Memory-Write-Invalidate
Enable MWI mechanism if PCI bus master supports it.
It might be potential benefit in some cases. Documentation [1] says that
standard Memory Write might supply more current data than in the CPU modified
cache line and "trashing a line in the cache may trash some data that is more
current that in the memory line". This allows to avoid potential retries and
other performance degradation issues on the bus.
[1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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