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| /openbmc/qemu/target/hppa/ |
| H A D | helper.h | diff 8577f354792414a2b24ef72c64730ed0f6bb071e Thu Oct 12 19:55:12 CDT 2023 Richard Henderson <richard.henderson@linaro.org> target/hppa: Implement IDTLBT, IITLBT
Rename the existing insert tlb helpers to emphasize that they
are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0.
Still missing is the new 'P' tlb bit.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| H A D | insns.decode | diff 8577f354792414a2b24ef72c64730ed0f6bb071e Thu Oct 12 19:55:12 CDT 2023 Richard Henderson <richard.henderson@linaro.org> target/hppa: Implement IDTLBT, IITLBT
Rename the existing insert tlb helpers to emphasize that they
are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0.
Still missing is the new 'P' tlb bit.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
| H A D | mem_helper.c | diff 8577f354792414a2b24ef72c64730ed0f6bb071e Thu Oct 12 19:55:12 CDT 2023 Richard Henderson <richard.henderson@linaro.org> target/hppa: Implement IDTLBT, IITLBT
Rename the existing insert tlb helpers to emphasize that they
are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0.
Still missing is the new 'P' tlb bit.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
| H A D | translate.c | diff 8577f354792414a2b24ef72c64730ed0f6bb071e Thu Oct 12 19:55:12 CDT 2023 Richard Henderson <richard.henderson@linaro.org> target/hppa: Implement IDTLBT, IITLBT
Rename the existing insert tlb helpers to emphasize that they
are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0.
Still missing is the new 'P' tlb bit.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|