Searched hist:"82 df5b7329aaeb21b3e8fc86fa2d62a3d68602aa" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/ingenic/ |
| H A D | x1830-cgu.c | diff 82df5b7329aaeb21b3e8fc86fa2d62a3d68602aa Sat Jul 25 00:11:36 CDT 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
The RTC unit in the Ingenic SoCs has two clock sources, one
is from an external 32.768kHz clock, and the other is from an
external 24MHz/48MHz main clock that is divided by 512. The
choice of these two clocks is controlled by the ERCS bit in
the OPCR register. The RNG unit will also use this clock.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-4-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| H A D | x1000-cgu.c | diff 82df5b7329aaeb21b3e8fc86fa2d62a3d68602aa Sat Jul 25 00:11:36 CDT 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
The RTC unit in the Ingenic SoCs has two clock sources, one
is from an external 32.768kHz clock, and the other is from an
external 24MHz/48MHz main clock that is divided by 512. The
choice of these two clocks is controlled by the ERCS bit in
the OPCR register. The RNG unit will also use this clock.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-4-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | jz4780-cgu.c | diff 82df5b7329aaeb21b3e8fc86fa2d62a3d68602aa Sat Jul 25 00:11:36 CDT 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
The RTC unit in the Ingenic SoCs has two clock sources, one
is from an external 32.768kHz clock, and the other is from an
external 24MHz/48MHz main clock that is divided by 512. The
choice of these two clocks is controlled by the ERCS bit in
the OPCR register. The RNG unit will also use this clock.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-4-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|