| /openbmc/linux/drivers/clk/at91/ |
| H A D | sama7g5.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91sam9n12.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | sama5d3.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | dt-compat.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91rm9200.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91sam9g45.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91sam9rl.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91sam9260.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | at91sam9x5.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | sam9x60.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | sama5d4.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | clk-master.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | sama5d2.c | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | pmc.h | diff 7a110b9107ed8fe27277988cdb4d18e7043b7252 Thu Nov 19 09:43:16 CST 2020 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: clk-master: re-factor master clock
Re-factor master clock driver by splitting it into 2 clocks: prescaller
and divider clocks. Based on registered clock flags the prescaler's rate
could be changed at runtime. This is necessary for platforms supporting
DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-11-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|