Searched hist:"78 c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/i915/ |
| H A D | i915_irq.c | diff 78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8 Mon Jun 11 15:02:57 CDT 2018 Ville Syrjälä <ville.syrjala@linux.intel.com> drm/i915: Fix pre-ILK error interrupt ack
Adjust the EIR clearing to cope with the edge triggered IIR
on i965/g4x. To guarantee an edge in the ISR master error bit
we temporarily mask everything in EMR. As some of the EIR bits
can't even be directly cleared we also borrow a trick from
i915_clear_error_registers() and permanently mask any bit that
remains high. No real thought given to how we might unmask them
again once the cause for the error has been clered. I suppose
on pre-g4x GPU reset will reinitialize EMR from scratch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611200258.27121-3-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
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| H A D | i915_reg.h | diff 78c357dd3fcf51de61a0b8db3abdb8ed5aea6dd8 Mon Jun 11 15:02:57 CDT 2018 Ville Syrjälä <ville.syrjala@linux.intel.com> drm/i915: Fix pre-ILK error interrupt ack
Adjust the EIR clearing to cope with the edge triggered IIR
on i965/g4x. To guarantee an edge in the ISR master error bit
we temporarily mask everything in EMR. As some of the EIR bits
can't even be directly cleared we also borrow a trick from
i915_clear_error_registers() and permanently mask any bit that
remains high. No real thought given to how we might unmask them
again once the cause for the error has been clered. I suppose
on pre-g4x GPU reset will reinitialize EMR from scratch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611200258.27121-3-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
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