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H A Digc_i225.hdiff 707abf0695481ad19b0b74af65f30c71123d6154 Tue Jun 02 02:50:47 CDT 2020 Sasha Neftin <sasha.neftin@intel.com> igc: Add initial LTR support

The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
H A Digc_mac.cdiff 707abf0695481ad19b0b74af65f30c71123d6154 Tue Jun 02 02:50:47 CDT 2020 Sasha Neftin <sasha.neftin@intel.com> igc: Add initial LTR support

The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
H A Digc_i225.cdiff 707abf0695481ad19b0b74af65f30c71123d6154 Tue Jun 02 02:50:47 CDT 2020 Sasha Neftin <sasha.neftin@intel.com> igc: Add initial LTR support

The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
H A Digc_regs.hdiff 707abf0695481ad19b0b74af65f30c71123d6154 Tue Jun 02 02:50:47 CDT 2020 Sasha Neftin <sasha.neftin@intel.com> igc: Add initial LTR support

The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
H A Digc_defines.hdiff 707abf0695481ad19b0b74af65f30c71123d6154 Tue Jun 02 02:50:47 CDT 2020 Sasha Neftin <sasha.neftin@intel.com> igc: Add initial LTR support

The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>