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| H A D | omap-mpuss-lowpower.c | diff 6d846c46683a4a8a54fbd30b0ff1434a7d898026 Thu Apr 12 06:31:52 CDT 2012 Santosh Shilimkar <santosh.shilimkar@ti.com> ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains
In addition to the standard power-management technique, the OMAP5 / DRA7
MPU subsystem also employs an SR3-APG (mercury) power management
technology to reduce leakage.
It allows for full logic and memories retention on MPU_C0 and MPU_C1 and
is controlled by the PRCM_MPU. Only "Fast-mode" is supported on the
OMAP5 and DRA7 family of processors.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor consolidation]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
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