Searched hist:"6 d73c23410cd0f8a54227dd0361fb8b9eadcb4b2" (Results 1 – 3 of 3) sorted by relevance
/openbmc/u-boot/arch/arm/include/asm/ |
H A D | pl310.h | diff 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 Wed Jan 29 13:39:49 CST 2014 Fabio Estevam <fabio.estevam@freescale.com> mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
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/openbmc/u-boot/include/configs/ |
H A D | mx6_common.h | diff 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 Wed Jan 29 13:39:49 CST 2014 Fabio Estevam <fabio.estevam@freescale.com> mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
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/openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | imx-regs.h | diff 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 Wed Jan 29 13:39:49 CST 2014 Fabio Estevam <fabio.estevam@freescale.com> mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
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