Searched hist:"6 aba33e939c41358cf731cbbdd9d5ca59c9266e8" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fdt.c | diff 6aba33e939c41358cf731cbbdd9d5ca59c9266e8 Thu Mar 19 03:40:08 CDT 2009 Kumar Gala <galak@kernel.crashing.org> powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers. Enable that cache as well as add information into the
device tree about it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| H A D | cpu_init.c | diff 6aba33e939c41358cf731cbbdd9d5ca59c9266e8 Thu Mar 19 03:40:08 CDT 2009 Kumar Gala <galak@kernel.crashing.org> powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers. Enable that cache as well as add information into the
device tree about it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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