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/openbmc/linux/drivers/clk/at91/
H A Dsama7g5.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91sam9n12.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dsama5d3.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Ddt-compat.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91rm9200.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91sam9g45.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91sam9rl.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91sam9260.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dat91sam9x5.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dsam9x60.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dclk-system.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dsama5d4.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dclk-peripheral.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dsama5d2.cdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com
H A Dpmc.hdiff 68b3b6f1773d2d1f8f58da7149e739213a3ed038 Thu Dec 08 05:45:13 CST 2022 Claudiu Beznea <claudiu.beznea@microchip.com> clk: at91: mark ddr clocks as critical

Mark DDR clocks as critical for AT91 devices. These clocks are enabled
by bootloader when initializing DDR and needs to stay enabled. Up to
this patch the DDR clocks were requested from drivers/memory/atmel-sdramc.c
which does only clock request and enable. There is no need to have
a separate driver just for this, thus the atmel-sdramc.c will be deleted
in a subsequent patch.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208114515.35179-2-claudiu.beznea@microchip.com