Searched hist:"679 db70801da9fda91d26caf13bf5b5ccc74e8e8" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/arm64/kvm/hyp/ |
| H A D | entry.S | diff 679db70801da9fda91d26caf13bf5b5ccc74e8e8 Thu Jun 14 05:23:38 CDT 2018 Will Deacon <will.deacon@arm.com> arm64: entry: Place an SB sequence following an ERET instruction
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.
This patch emits an SB sequence after each ERET so that speculation is
held up on exception return.
Signed-off-by: Will Deacon <will.deacon@arm.com>
|
| H A D | hyp-entry.S | diff 679db70801da9fda91d26caf13bf5b5ccc74e8e8 Thu Jun 14 05:23:38 CDT 2018 Will Deacon <will.deacon@arm.com> arm64: entry: Place an SB sequence following an ERET instruction
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.
This patch emits an SB sequence after each ERET so that speculation is
held up on exception return.
Signed-off-by: Will Deacon <will.deacon@arm.com>
|
| /openbmc/linux/arch/arm64/kernel/ |
| H A D | entry.S | diff 679db70801da9fda91d26caf13bf5b5ccc74e8e8 Thu Jun 14 05:23:38 CDT 2018 Will Deacon <will.deacon@arm.com> arm64: entry: Place an SB sequence following an ERET instruction
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.
This patch emits an SB sequence after each ERET so that speculation is
held up on exception return.
Signed-off-by: Will Deacon <will.deacon@arm.com>
|