Searched hist:"60 a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/exec/ |
| H A D | cpu-defs.h | diff 60a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4 Sat Oct 20 15:54:46 CDT 2018 Richard Henderson <richard.henderson@linaro.org> cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush
Protect it with the tlb_lock instead of using atomics.
The move puts it in or near the same cacheline as the lock;
using the lock means we don't need a second atomic operation
in order to perform the update. Which makes it cheap to also
update pending_flush in tlb_flush_by_mmuidx_async_work.
Tested-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
| /openbmc/qemu/accel/tcg/ |
| H A D | cputlb.c | diff 60a2ad7d86e7379e6669806bedaa6cfdf4f2c2f4 Sat Oct 20 15:54:46 CDT 2018 Richard Henderson <richard.henderson@linaro.org> cputlb: Move cpu->pending_tlb_flush to env->tlb_c.pending_flush
Protect it with the tlb_lock instead of using atomics.
The move puts it in or near the same cacheline as the lock;
using the lock means we don't need a second atomic operation
in order to perform the update. Which makes it cheap to also
update pending_flush in tlb_flush_by_mmuidx_async_work.
Tested-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|