Searched hist:"5 bcba4e6c13f0c889da1f9e67ee10accd9ca4c19" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | ppc-opcode.h | diff 5bcba4e6c13f0c889da1f9e67ee10accd9ca4c19 Mon Jun 19 02:36:25 CDT 2023 Benjamin Gray <bgray@linux.ibm.com> powerpc/dexcr: Handle hashchk exception
Recognise and pass the appropriate signal to the user program when a
hashchk instruction triggers. This is independent of allowing
configuration of DEXCR[NPHIE], as a hypervisor can enforce this aspect
regardless of the kernel.
The signal mirrors how ARM reports their similar check failure. For
example, their FPAC handler in arch/arm64/kernel/traps.c do_el0_fpac()
does this. When we fail to read the instruction that caused the fault
we send a segfault, similar to how emulate_math() does it.
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230616034846.311705-5-bgray@linux.ibm.com
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | traps.c | diff 5bcba4e6c13f0c889da1f9e67ee10accd9ca4c19 Mon Jun 19 02:36:25 CDT 2023 Benjamin Gray <bgray@linux.ibm.com> powerpc/dexcr: Handle hashchk exception
Recognise and pass the appropriate signal to the user program when a
hashchk instruction triggers. This is independent of allowing
configuration of DEXCR[NPHIE], as a hypervisor can enforce this aspect
regardless of the kernel.
The signal mirrors how ARM reports their similar check failure. For
example, their FPAC handler in arch/arm64/kernel/traps.c do_el0_fpac()
does this. When we fail to read the instruction that caused the fault
we send a segfault, similar to how emulate_math() does it.
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230616034846.311705-5-bgray@linux.ibm.com
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