Searched hist:"57 b7068de5d0cca8ac6e21085b843c1bbd49d3f4" (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | cdns,xtfpga-i2s.txt | 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| /openbmc/linux/sound/soc/xtensa/ |
| H A D | Kconfig | 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Makefile | 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | xtfpga-i2s.c | 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| /openbmc/linux/sound/soc/ |
| H A D | Kconfig | diff 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Makefile | diff 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| /openbmc/linux/ |
| H A D | MAINTAINERS | diff 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 Fri Dec 26 11:19:38 CST 2014 Max Filippov <jcmvbkbc@gmail.com> ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
|