Searched hist:"566 ce04de4a2b4c66be8e13751dbb0bfe80117b3" (Results 1 – 2 of 2) sorted by relevance
/openbmc/u-boot/board/imgtec/malta/ |
H A D | lowlevel_init.S | diff 566ce04de4a2b4c66be8e13751dbb0bfe80117b3 Wed Sep 21 05:18:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> MIPS: Malta: Enable CM & L2 support
Enable support for the MIPS Coherence Manager & L2 caches on the MIPS Malta board, removing the need for us to attempt to bypass the L2 during boot (which would fail with recent CPUs that expose L2 config via the CM anyway).
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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/openbmc/u-boot/arch/mips/ |
H A D | Kconfig | diff 566ce04de4a2b4c66be8e13751dbb0bfe80117b3 Wed Sep 21 05:18:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> MIPS: Malta: Enable CM & L2 support
Enable support for the MIPS Coherence Manager & L2 caches on the MIPS Malta board, removing the need for us to attempt to bypass the L2 during boot (which would fail with recent CPUs that expose L2 config via the CM anyway).
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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