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H A Dcache_init.Sdiff 536cb7ce1aca10c326ac864b3e1d05ab57b3ec7e Wed Jan 28 19:27:59 CST 2015 Paul Burton <paul.burton@imgtec.com> MIPS: refactor L1 cache config reads to a macro

Reduce duplication between reading the configuration of the L1 dcache &
icache by performing both using a macro which calculates the appropriate
line & cache sizes from the coprocessor 0 Config1 register.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>