Searched hist:"5326 ad54c5ef01a828cf5a942f6fdbf204ef7d3f" (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | soc15.h | diff 5326ad54c5ef01a828cf5a942f6fdbf204ef7d3f Fri Apr 05 14:31:47 CDT 2019 James Zhu <James.Zhu@amd.com> drm/amdgpu: add gfx9 gpr EDC workaround when RAS is enabled
When RAS is enabled, initializes the VGPRs/LDS/SGPRs and resets EDC error counts. This is done in late_init, before RAS TA GFX enable.
Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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H A D | gfx_v9_0.c | diff 5326ad54c5ef01a828cf5a942f6fdbf204ef7d3f Fri Apr 05 14:31:47 CDT 2019 James Zhu <James.Zhu@amd.com> drm/amdgpu: add gfx9 gpr EDC workaround when RAS is enabled
When RAS is enabled, initializes the VGPRs/LDS/SGPRs and resets EDC error counts. This is done in late_init, before RAS TA GFX enable.
Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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