Searched hist:"520040146 a0af36f7875ec06b58f44b19a0edf53" (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/arch/x86/kvm/ |
| H A D | irq_comm.c | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| H A D | lapic.h | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| H A D | x86.h | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| H A D | lapic.c | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| H A D | x86.c | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| /openbmc/linux/arch/x86/include/asm/ |
| H A D | kvm_host.h | diff 520040146a0af36f7875ec06b58f44b19a0edf53 Mon Jan 25 02:53:33 CST 2016 Feng Wu <feng.wu@intel.com> KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Use vector-hashing to deliver lowest-priority interrupts, As an
example, modern Intel CPUs in server platform use this method to
handle lowest-priority interrupts.
Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|