Searched hist:"50 d8cfb949066e4466700e814a0e26719d70a951" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/target/ppc/ |
| H A D | timebase_helper.c | diff 50d8cfb949066e4466700e814a0e26719d70a951 Fri May 24 02:49:52 CDT 2024 Nicholas Piggin <npiggin@gmail.com> target/ppc: Add helpers to check for SMT sibling threads
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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| H A D | misc_helper.c | diff 50d8cfb949066e4466700e814a0e26719d70a951 Fri May 24 02:49:52 CDT 2024 Nicholas Piggin <npiggin@gmail.com> target/ppc: Add helpers to check for SMT sibling threads
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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| H A D | cpu_init.c | diff 50d8cfb949066e4466700e814a0e26719d70a951 Fri May 24 02:49:52 CDT 2024 Nicholas Piggin <npiggin@gmail.com> target/ppc: Add helpers to check for SMT sibling threads
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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| H A D | excp_helper.c | diff 50d8cfb949066e4466700e814a0e26719d70a951 Fri May 24 02:49:52 CDT 2024 Nicholas Piggin <npiggin@gmail.com> target/ppc: Add helpers to check for SMT sibling threads
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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| H A D | cpu.h | diff 50d8cfb949066e4466700e814a0e26719d70a951 Fri May 24 02:49:52 CDT 2024 Nicholas Piggin <npiggin@gmail.com> target/ppc: Add helpers to check for SMT sibling threads
Add helpers for TCG code to determine if there are SMT siblings
sharing per-core and per-lpar registers. This simplifies the
callers and makes SMT register topology simpler to modify with
later changes.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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