Searched hist:"4 afe2d1a6ed5cba794aeeaa816e7c97a45167b01" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/clk/ingenic/ |
| H A D | jz4780-cgu.c | diff 4afe2d1a6ed5cba794aeeaa816e7c97a45167b01 Mon May 09 11:29:52 CDT 2016 Harvey Hunt <harvey.hunt@imgtec.com> clk: ingenic: Allow divider value to be divided
The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | cgu.h | diff 4afe2d1a6ed5cba794aeeaa816e7c97a45167b01 Mon May 09 11:29:52 CDT 2016 Harvey Hunt <harvey.hunt@imgtec.com> clk: ingenic: Allow divider value to be divided
The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | jz4740-cgu.c | diff 4afe2d1a6ed5cba794aeeaa816e7c97a45167b01 Mon May 09 11:29:52 CDT 2016 Harvey Hunt <harvey.hunt@imgtec.com> clk: ingenic: Allow divider value to be divided
The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | cgu.c | diff 4afe2d1a6ed5cba794aeeaa816e7c97a45167b01 Mon May 09 11:29:52 CDT 2016 Harvey Hunt <harvey.hunt@imgtec.com> clk: ingenic: Allow divider value to be divided
The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|