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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci-esdhc.h | diff 48e304cc1970b65f43c0d2f82aaf48285f0eccd2 Thu Nov 22 21:15:37 CST 2018 Yangbo Lu <yangbo.lu@nxp.com> mmc: sdhci-of-esdhc: workaround for unreliable pulse width detection
This was a SoC issue on LX2160A Rev1.0.
eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] must be set to 0 to
get 4 delay cells in the pulse width detection logic for eMMC
HS400 mode. Otherwise it would cause unexpected HS400 issue.
This patch is to clear this bit always for affected SoC when
reset for all, since this bit doesn't affect other speed modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| H A D | sdhci-of-esdhc.c | diff 48e304cc1970b65f43c0d2f82aaf48285f0eccd2 Thu Nov 22 21:15:37 CST 2018 Yangbo Lu <yangbo.lu@nxp.com> mmc: sdhci-of-esdhc: workaround for unreliable pulse width detection
This was a SoC issue on LX2160A Rev1.0.
eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] must be set to 0 to
get 4 delay cells in the pulse width detection logic for eMMC
HS400 mode. Otherwise it would cause unexpected HS400 issue.
This patch is to clear this bit always for affected SoC when
reset for all, since this bit doesn't affect other speed modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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