Searched hist:"43 cdaa1567ad3931fbde438853947d45238cc040" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-pll14xx.c | diff 43cdaa1567ad3931fbde438853947d45238cc040 Fri Sep 06 08:34:05 CDT 2019 Anson Huang <Anson.Huang@nxp.com> clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
to pll14xx driver can save a lot of duplicated code on each
platform.
Meanwhile, no need to define PLL clock structure for every
module which uses same type of PLL, e.g., audio/video/dram use
1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
structure for each group is enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
| H A D | clk-imx8mm.c | diff 43cdaa1567ad3931fbde438853947d45238cc040 Fri Sep 06 08:34:05 CDT 2019 Anson Huang <Anson.Huang@nxp.com> clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
to pll14xx driver can save a lot of duplicated code on each
platform.
Meanwhile, no need to define PLL clock structure for every
module which uses same type of PLL, e.g., audio/video/dram use
1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
structure for each group is enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
| H A D | clk.h | diff 43cdaa1567ad3931fbde438853947d45238cc040 Fri Sep 06 08:34:05 CDT 2019 Anson Huang <Anson.Huang@nxp.com> clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
to pll14xx driver can save a lot of duplicated code on each
platform.
Meanwhile, no need to define PLL clock structure for every
module which uses same type of PLL, e.g., audio/video/dram use
1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
structure for each group is enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|