Searched hist:"4215 a11923362ec53e85dfe25160beeebf41fd2c" (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/ |
H A D | smu_cmn.c | diff 4215a11923362ec53e85dfe25160beeebf41fd2c Thu Feb 25 01:22:51 CST 2021 Horace Chen <horace.chen@amd.com> drm/amdgpu: enable one vf mode on sienna cichlid vf
sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf.
OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf.
Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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H A D | amdgpu_smu.c | diff 4215a11923362ec53e85dfe25160beeebf41fd2c Thu Feb 25 01:22:51 CST 2021 Horace Chen <horace.chen@amd.com> drm/amdgpu: enable one vf mode on sienna cichlid vf
sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf.
OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf.
Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/pm/ |
H A D | amdgpu_pm.c | diff 4215a11923362ec53e85dfe25160beeebf41fd2c Thu Feb 25 01:22:51 CST 2021 Horace Chen <horace.chen@amd.com> drm/amdgpu: enable one vf mode on sienna cichlid vf
sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf.
OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf.
Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | sienna_cichlid_ppt.c | diff 4215a11923362ec53e85dfe25160beeebf41fd2c Thu Feb 25 01:22:51 CST 2021 Horace Chen <horace.chen@amd.com> drm/amdgpu: enable one vf mode on sienna cichlid vf
sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf.
OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf.
Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_device.c | diff 4215a11923362ec53e85dfe25160beeebf41fd2c Thu Feb 25 01:22:51 CST 2021 Horace Chen <horace.chen@amd.com> drm/amdgpu: enable one vf mode on sienna cichlid vf
sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf.
OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf.
Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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