Searched hist:"3 de79d335c9aa7d726865e3933d9b21781032183" (Results 1 – 1 of 1) sorted by relevance
/openbmc/qemu/target/arm/ |
H A D | cpu.c | diff 3de79d335c9aa7d726865e3933d9b21781032183 Tue Jun 11 10:39:42 CDT 2019 Peter Maydell <peter.maydell@linaro.org> target/arm: Fix Cortex-R5F MVFR values
The Cortex-R5F initfn was not correctly setting up the MVFR ID register values. Fill these in, since some subsequent patches will use ID register checks rather than CPU feature bit checks.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
|