Searched hist:"3 c29632feba7724be447b621f3527136e5c32744" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/target/arm/ |
| H A D | syndrome.h | diff 3c29632feba7724be447b621f3527136e5c32744 Fri May 06 13:02:33 CDT 2022 Richard Henderson <richard.henderson@linaro.org> target/arm: Implement virtual SError exceptions
Virtual SError exceptions are raised by setting HCR_EL2.VSE,
and are routed to EL1 just like other virtual exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | internals.h | diff 3c29632feba7724be447b621f3527136e5c32744 Fri May 06 13:02:33 CDT 2022 Richard Henderson <richard.henderson@linaro.org> target/arm: Implement virtual SError exceptions
Virtual SError exceptions are raised by setting HCR_EL2.VSE,
and are routed to EL1 just like other virtual exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | cpu.c | diff 3c29632feba7724be447b621f3527136e5c32744 Fri May 06 13:02:33 CDT 2022 Richard Henderson <richard.henderson@linaro.org> target/arm: Implement virtual SError exceptions
Virtual SError exceptions are raised by setting HCR_EL2.VSE,
and are routed to EL1 just like other virtual exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | cpu.h | diff 3c29632feba7724be447b621f3527136e5c32744 Fri May 06 13:02:33 CDT 2022 Richard Henderson <richard.henderson@linaro.org> target/arm: Implement virtual SError exceptions
Virtual SError exceptions are raised by setting HCR_EL2.VSE,
and are routed to EL1 just like other virtual exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | helper.c | diff 3c29632feba7724be447b621f3527136e5c32744 Fri May 06 13:02:33 CDT 2022 Richard Henderson <richard.henderson@linaro.org> target/arm: Implement virtual SError exceptions
Virtual SError exceptions are raised by setting HCR_EL2.VSE,
and are routed to EL1 just like other virtual exceptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|