Searched hist:"39 ec9ace7afe3a35f78eb4beffd18ad34a1e0278" (Results 1 – 8 of 8) sorted by relevance
| /openbmc/linux/drivers/pinctrl/uniphier/ |
| H A D | pinctrl-uniphier.h | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-ld6b.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-pro5.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-sld8.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-ld4.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-pxs2.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-pro4.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-uniphier-core.c | diff 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 Tue May 31 03:05:18 CDT 2016 Masahiro Yamada <yamada.masahiro@socionext.com> pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|