Searched hist:"39 df00d9aecfb465b9eec9af593f9b763fb5209a" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/drivers/i2c/ |
| H A D | fsl_i2c.c | diff 39df00d9aecfb465b9eec9af593f9b763fb5209a Thu Jul 09 05:04:26 CDT 2009 Heiko Schocher <hs@denx.de> i2c, mpc83xx: add CONFIG_SYS_I2C_INIT_BOARD for fsl_i2c
This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.
The deblock sequence for this board is implemented and
tested in the following way:
CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
3. dummy read
CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)
Signed-off-by: Heiko Schocher <hs@denx.de>
|
| /openbmc/u-boot/board/keymile/common/ |
| H A D | common.c | diff 39df00d9aecfb465b9eec9af593f9b763fb5209a Thu Jul 09 05:04:26 CDT 2009 Heiko Schocher <hs@denx.de> i2c, mpc83xx: add CONFIG_SYS_I2C_INIT_BOARD for fsl_i2c
This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.
The deblock sequence for this board is implemented and
tested in the following way:
CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
3. dummy read
CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)
Signed-off-by: Heiko Schocher <hs@denx.de>
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