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| H A D | cpu.h | diff 39db007eda4310f305fdbc712d59d99284bf11d4 Thu Aug 20 00:48:18 CDT 2020 Richard Henderson <richard.henderson@linaro.org> target/microblaze: Fix width of EDR
The exception data register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| H A D | translate.c | diff 39db007eda4310f305fdbc712d59d99284bf11d4 Thu Aug 20 00:48:18 CDT 2020 Richard Henderson <richard.henderson@linaro.org> target/microblaze: Fix width of EDR
The exception data register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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