Searched hist:"3358 d2d9f47af86bdd71edb24b361f72a54ec04e" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/include/linux/clk/ |
| H A D | tegra.h | diff 3358d2d9f47af86bdd71edb24b361f72a54ec04e Thu Jun 18 16:28:40 CDT 2015 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
On Tegra210, hardware control of the SATA and XUSB pad PLLs must be
done during the UPHY enable sequence rather than the PLLE enable
sequence. Export functions to do this so that hardware control can
be enabled from the XUSB padctl driver.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-tegra210.c | diff 3358d2d9f47af86bdd71edb24b361f72a54ec04e Thu Jun 18 16:28:40 CDT 2015 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
On Tegra210, hardware control of the SATA and XUSB pad PLLs must be
done during the UPHY enable sequence rather than the PLLE enable
sequence. Export functions to do this so that hardware control can
be enabled from the XUSB padctl driver.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|