Searched hist:"30 d8b7d43c840f5907c0e688d41093f176ba8ac1" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk.h | diff 30d8b7d43c840f5907c0e688d41093f176ba8ac1 Wed Sep 07 11:01:56 CDT 2022 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add MUXTBL variant
Add a clock branch consisting of a mux with non-standard
select values. The parent in Mux table is sorted by priority.
Use clk_register_mux_table() to register such a mux-clock.
Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220907160207.3845791-3-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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| H A D | clk.c | diff 30d8b7d43c840f5907c0e688d41093f176ba8ac1 Wed Sep 07 11:01:56 CDT 2022 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add MUXTBL variant
Add a clock branch consisting of a mux with non-standard
select values. The parent in Mux table is sorted by priority.
Use clk_register_mux_table() to register such a mux-clock.
Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220907160207.3845791-3-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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