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| H A D | fsl_micfil.c | diff 292709b9cf3ba470af94b62c9bb60284cc581b79 Sat May 07 07:14:13 CDT 2022 Shengjiu Wang <shengjiu.wang@nxp.com> ASoC: fsl_micfil: explicitly clear software reset bit
SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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