Searched hist:"1 f7f9ab7900ec92c0beac0660cdce37d6af02d38" (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/arm/display/komeda/d71/ |
| H A D | d71_dev.h | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| H A D | d71_dev.c | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| H A D | d71_component.c | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| /openbmc/linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_kms.h | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| H A D | komeda_pipeline.h | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| H A D | komeda_pipeline_state.c | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|
| H A D | komeda_crtc.c | diff 1f7f9ab7900ec92c0beac0660cdce37d6af02d38 Thu May 23 06:10:21 CDT 2019 james qian wang (Arm Technology China) <james.qian.wang@arm.com> drm/komeda: Add engine clock requirement check for the downscaling
For downscaling there is a restriction, the downscaling needed engine
clock can not acceed the real engine clock, and the clock requirement
mostly depend on the specific HW, to solve this problem:
1. Add a pipeline func - downscaling_clk_check for CORE to query the real
HW if downscaling can be supported.
2. Add new property clock ratio which is the ratio of:
(mclk << 32) / pxlclk
then User driver can use this ratio to do the clock check to avoid post
an invalid downscaling to kernel.
v2: Rebase and Delete debug print
Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
|