Searched hist:"1 b3c5cdab49a605f0e048e1ccbf4cc61a2626485" (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | lite5200.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| H A D | mpc8349emitxgp.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | mpc8313erdb.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | lite5200b.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | mpc832x_rdb.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | mpc8349emitx.dts | diff 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 Wed Sep 12 18:23:46 CDT 2007 Kumar Gala <galak@kernel.crashing.org> [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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