Searched hist:"17 eebd1a435c8616c47b715e3447f4a9c15b741f" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | smp.h | diff 17eebd1a435c8616c47b715e3447f4a9c15b741f Tue Apr 12 09:46:00 CDT 2016 Suzuki K Poulose <suzuki.poulose@arm.com> arm64: Add cpu_panic_kernel helper
During the activation of a secondary CPU, we could report serious
configuration issues and hence request to crash the kernel. We do
this for CPU ASID bit check now. We will need it also for handling
mismatched exception levels for the CPUs with VHE. Hence, add a
helper to do the same for reusability.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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| /openbmc/linux/arch/arm64/mm/ |
| H A D | context.c | diff 17eebd1a435c8616c47b715e3447f4a9c15b741f Tue Apr 12 09:46:00 CDT 2016 Suzuki K Poulose <suzuki.poulose@arm.com> arm64: Add cpu_panic_kernel helper
During the activation of a secondary CPU, we could report serious
configuration issues and hence request to crash the kernel. We do
this for CPU ASID bit check now. We will need it also for handling
mismatched exception levels for the CPUs with VHE. Hence, add a
helper to do the same for reusability.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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