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| H A D | aspeed_hace.c | diff 0fdcca145fcfef62406d017ad530f3e10b196a76 Thu Jul 29 05:27:44 CDT 2021 Joel Stanley <joel@jms.id.au> aspeed/hace: Reset when error occurs
Some hasing operations have been triggering an error state.
This can be reproduced on the u-boot command line:
hash sha512 83000128 3762a8
This completes, and the hash is correct. However HACE1C, the status
register, shows an error bit is set 0x00800000.
$ bitfield HACE1C 0x00800000 |grep 0x1
Hash input data buffer overflow: 0x1
The next operation is queued, and this never completes. The status
register shows 0x00c00001
$ bitfield HACE1C 0x00c00001 |grep 0x1
Hash input data buffer overflow: 0x1
Hash input rorate data overflow: 0x1
Hash engine busy: 0x1
A HACE reset will clear this state:
mw.l 0x1e6e2040 0x10
mw.l 0x1e6e2044 0x10
Adding code to do this if any error bits are set in the status register
is a workaround for the issue while further debugging is done.
Another workaround is to do an operation before running the problematic
operation. This sequence succeeds:
hash sha512 83000000 10
hash sha512 83000128 3762a8
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Change-Id: I4e078d7270513244c41824bc9e0867a29383cbbd
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