Searched hist:"0 f8d06f16c9d1041d728d09d464462ebe713c662" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/arm/ |
| H A D | cpu.c | diff 0f8d06f16c9d1041d728d09d464462ebe713c662 Fri Nov 02 05:20:25 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/arm: Conditionalize some asserts on aarch32 support
When populating id registers from kvm, on a host that doesn't support
aarch32 mode at all, neither arm_div nor jazelle will be supported either.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20181102102025.3546-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| H A D | cpu.h | diff 0f8d06f16c9d1041d728d09d464462ebe713c662 Fri Nov 02 05:20:25 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/arm: Conditionalize some asserts on aarch32 support
When populating id registers from kvm, on a host that doesn't support
aarch32 mode at all, neither arm_div nor jazelle will be supported either.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20181102102025.3546-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|